Index of /~nez/seminar2

[ICO]NameLast modifiedSizeDescription

[PARENTDIR]Parent Directory  -  
[   ]01.Design of High-Speed Low-Power Parallel-Prefix VLSI Adders.Latifi.pdf2008-08-17 22:19 731K 
[   ]01a.Design of High-Speed Low-Power Parallel-Prefix VLSI Adders.Latifi.pdf2008-10-08 22:26 445K 
[   ]02.A High-Speed Small RSA Encryption LSI with Low Power Dissipation.Burschka.pdf2008-07-04 17:40 1.4M 
[   ]02a.A High-Speed Small RSA Encryption LSI with Low Power Dissipation.Burschka.pdf2008-09-01 12:16 826K 
[   ]03.Minimizing the Power Consumption of an Asynchronous Multiplier.Z”llner.pdf2008-07-04 16:48 4.7M 
[   ]03.Minimizing the Power Consumption of an Asynchronous Multiplier.Zöllner.pdf2008-07-04 17:48 4.7M 
[   ]03a.Mimimizing the Power Consumption of an Asynchronous Multiplier.Z”llner.pdf2008-10-08 21:21 201K 
[   ]03a.Mimimizing the Power Consumption of an Asynchronous Multiplier.Zöllner.pdf2008-10-08 22:21 201K 
[   ]04.Reducing Switching Activity of Subtraction via Variable Truncation of the Most-Significant Bits.Schieck.pdf2008-07-04 17:34 1.1M 
[   ]04a.Reducing Switching Activity of Subtraction via Variable Truncation of the Most-Significant Bits.Schieck.pdf2008-10-08 22:09 933K 
[   ]05.Power Aware Dividers in FPGA.Schilling.pdf2008-10-10 10:06 702K 
[   ]05a.Power Aware Dividers in FPGA.Schilling.pdf2008-10-08 22:56 921K